1. Field of the Invention
The present invention relates to a frequency synthesizer.
2. Description of the Related Art
As a frequency synthesizer, there has been known one that A/D-converts (analog/digital-converts) an output signal of a voltage controlled oscillator, processes an obtained digital signal, and inputs the processing result to the voltage controlled oscillator, thereby forming a PLL (Phase Locked Loop). For example, a patent document 1 describes a frequency synthesizer that A/D-converts (analog/digital-converts) an output signal of a voltage controlled oscillator, quadrature-detects a sinusoidal signal generated from the resultant digital signal, extracts a rotation vector rotating at a difference frequency between the sinusoidal signal and a sinusoidal signal used in the detection, integrates a difference velocity between this rotation vector and a rotation vector rotating in reverse to the rotation vector and rotating at a frequency corresponding to a set frequency, and uses the integration result as an input voltage of the voltage controlled oscillator.
However, there is a problem that phase noise occurs in an output of the frequency synthesizer because of the presence of the phase noise in the PLL.
[Patent document 1] Japanese Patent Application Laid-open No. 2007-74291